設備功能

處理器

Xilinx Virtex6 XC6VLX195T FPGA

板載內存

1 GByte DDR3-RAM

I/O模塊接口（信號觸發和同步）

Trigger/GPIO-IF (Opto Trigger, TTL Trigger)

通過接口供電（每個端口）

PoCL (4W/12V per cable, Safe Power)

相機接口

標準

Camera Link 2.0

接口

Camera Link

配置

CL-deca (80bit), Including non-Standard formats: Bilinear color, CL-full

接頭

2 x MDR26

功率輸出

PoCL SafePower, 4W/12V per cable

相機支持

area scan camera, line scan camera

芯片類型

CFA sensor (Bayer), Grayscale sensor

芯片分辨率

16k*64k (area scan sensor), 16k (line scan sensor)

位深

8-16-bit (grayscale), 24-48-bit (color)

數據帶寬

6,8 Gbit/s (850 MB/s)

數據帶寬（每個端口；總計）

6,8 Gbps; 6,8 Gbps (850 MB/s)

端口數

2

測試環境

Camera Simulator

主機PC接口

PC總線接口

PCIe 2.1 x8, DMA3600

PC總線接口性能

up to 3.600 MB/s (sustainable)

控件和通用I/O

觸發板GPIO接口

Box connector (34-pin)

板載GPIO接口

One 34-pin flat cable connector onboard: 8 input signals and 8 output signals with open-drain optionally as 4 opto-coupled inputs (4,5V - 28V), optional 2 opto-coupled differential inputs (RS422); 4 opto-coupled outputs (4,5V - 28V)

GPIO同步和控制

Configurable Trigger System supporting several trigger modes (grabber controlled, external trigger, gated, software trigger) and shaft encoder functionality with backward compensation, Multi-Camera-Synchronization

GPIO接口概述

onboard: 8in/8out (max.), TTL or opto-coupled

處理功能

基本功能

Image Selector, LUT, Invert, ROI, Offset/Gain/Gamma correction, Tap Sorting (Sensor Readout Correction)

物理和環境信息

尺寸

PCIe Standard height, half length card: 167.64 mm length x 111.15 mm height

功耗/電源

14 V, 2.5 A

操作溫度

0 - 50°C (32°F - 122°F)

存儲溫度

-50 - 80°C (-58°F - 176°F)

MTBF

on request

合規

WEEE, RoHS, REACH, CE class A

軟件

軟件驅動程序

Windows 10 / 8 / 7 (64-Bit), Windows 10 / 8 / 7 (32-Bit), Linux 32-Bit, Linux 64-Bit

軟件工具

microDisplay (Acquisition control and viewer), GenICam Explorer (Camera configuration tool), microDiagnostics (Analysis and service tool), Device Drivers, SDK, Documentation

軟件API

Framegrabber SDK, .net interface

FPGA編程

not programmable

BV-軟件兼容性

Halcon, VisionPro, Labview